Synthesizer Variants

The NanoVNA-H uses a frequency synthesizer to generate the stimulus signal and local oscillator frequencies. Several synthesizer and mixer IC variants have been used across hardware revisions.

Frequency Synthesizer ICs

Si5351A (Original)

The Silicon Labs Si5351A is the original clock generator used in NanoVNA designs.

Parameter	Value
Manufacturer	Silicon Labs
Input Clock	25/26/27 MHz
Outputs	3 (CLK0, CLK1, CLK2)
Frequency Range	8 kHz - 160 MHz
PLL Range	600 - 900 MHz
I2C Address	0x60

NanoVNA Usage:

• CLK0: Stimulus signal (Port 1)
• CLK1: Local oscillator for CH0 mixer
• CLK2: Local oscillator for CH1 mixer

MS5351M

Chinese-manufactured Si5351 compatible part.

Parameter	Value
Compatibility	Si5351A pin/register compatible
VCO Range	Differs slightly from Si5351
Status	Common in production units

Caution

Some MS5351 units cannot lock the VCO at 1200 MHz. The firmware adjusts VCO switching to require only 470-1176 MHz range.

SMC5351 / SJWCH5351

Renamed variants of the same part (SMC5351 was renamed to SJWCH5351).

Parameter	Value
Manufacturer	Shengjiaweihe (SJWCH)
Compatibility	Si5351A compatible
Power Consumption	Lower than Si5351A
Port Isolation	Improved
Frequency Range	600 Hz - 200 MHz+

Advantages:

• Lower power consumption
• Better port-to-port isolation
• Can operate down to 600 Hz when paired with ZeeTK mixer

Mixer ICs

The mixer converts the RF signal to an intermediate frequency for processing by the audio codec.

NXP SA612A (Original)

Parameter	Value
Manufacturer	NXP
Type	Gilbert cell mixer
Frequency Range	DC - 500 MHz
Noise Figure	5 dB typical
Status	Discontinued

Firmware Configuration:

// Comment out __ZEETK__ for SA612A hardware
// #define __ZEETK__
#define FREQUENCY_MIN     1600    // Minimum frequency 1.6 kHz
#define FREQUENCY_THRESHOLD  290000110U  // ~290 MHz

ZeeTK NE602A

Pin-compatible replacement for SA612A with different internal characteristics.

Parameter	Value
Manufacturer	ZeeTK
Compatibility	SA612A pin compatible
Frequency Range	DC - 500 MHz
Harmonic Behavior	Different from SA612A
Status	Current production

Firmware Configuration:

#define __ZEETK__
#define FREQUENCY_MIN     600     // Minimum frequency 600 Hz
#define FREQUENCY_THRESHOLD  300000110U  // ~300 MHz

Note

Due to different manufacturing processes, the NE602A has different harmonic response characteristics. Hardware schematics were modified in rev 3.7 and 4.4 to compensate.

Frequency Generation Modes

Direct Mode (Below Threshold)

For frequencies below the harmonic threshold (~290-300 MHz):

1. Si5351 generates stimulus frequency directly
2. Local oscillator = stimulus + IF offset
3. Maximum dynamic range (>70 dB)

Harmonic Mode (Above Threshold)

For frequencies above the threshold up to 2 GHz:

1. Si5351 generates a sub-frequency
2. Output filter selects the desired harmonic (3rd, 5th, 7th)
3. Reduced dynamic range (40-50 dB)

Frequency Range	Harmonic	Divider
290-580 MHz	3rd	/3
580-1160 MHz	5th	/5
1160-2000 MHz	7th	/7

VCO Frequency Handling

The Si5351 PLL (VCO) operates from 600-900 MHz. The firmware calculates optimal PLL and divider settings:

// From si5351.c - PLL frequency calculation
// PLL must be 600-900 MHz
// Output = PLL / divider

MS5351 VCO Workaround

Some MS5351 units have limited VCO lock range. The firmware adjusts:

// VCO lock range requirement: 470-1176 MHz
// May cause measurement spikes around 588 MHz band edges

I2C Configuration

All synthesizer variants use the same I2C interface:

Parameter	Value
I2C Address	0x60 (7-bit)
Clock Speed	900 kHz (default)
Available Speeds	400k, 600k, 900k

The firmware supports multiple I2C speeds configured via STM32_I2C_SPEED in nanovna.h.

Output Drive Strength

The Si5351/compatible parts support configurable output drive:

Setting	Current	Power Level
AUTO	Automatic	Firmware selected
2 mA	2 mA	Lowest
4 mA	4 mA	Low
6 mA	6 mA	Medium
8 mA	8 mA	Highest

Select via menu: CALIBRATE > POWER AUTO or shell command power.

Timing Parameters

The firmware includes delay parameters for synthesizer settling:

Parameter	Value	Description
DELAY_BAND_1_2	100 us	Bands 1-2 settling
DELAY_BAND_3_4	300 us	Bands 3-4 settling
DELAY_BANDCHANGE	5000 us	Band change delay
DELAY_CHANNEL_CHANGE	400 us	Channel switch delay
DELAY_SWEEP_START	2000 us	Sweep start delay
DELAY_RESET_PLL_AFTER	4000 us	Post-PLL reset delay

Troubleshooting

VCO Lock Failures

Symptoms: Measurement spikes at certain frequencies (often near 588 MHz)

Cause: MS5351 VCO cannot lock at required frequency

Solution:

• Firmware automatically routes around problem frequencies
• Some edge frequencies may still show anomalies

Harmonic Mode Noise

Symptoms: Increased noise floor above 290/300 MHz

Cause: Normal operation - harmonic mode has reduced dynamic range

Solution:

• Use direct mode frequencies when possible
• Increase IF bandwidth averaging for noisy signals

Port Isolation Issues

Symptoms: Crosstalk between CH0 and CH1

Cause: Synthesizer output coupling

Solution:

• SJWCH5351 provides improved isolation
• Ensure proper calibration

Source Code Reference

Synthesizer driver code is located in:

• Driver: si5351.c
• Register definitions: si5351.c internal
• Timing parameters: nanovna.h lines 406-428
• Frequency thresholds: nanovna.h lines 186-191